1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same. More specifically, the present invention relates to a structure and a manufacturing method of a transistor used in a peripheral circuit for supplying a predetermined voltage to a memory cell transistor.
2. Description of the Background Art
In general, a memory cell transistor in a non-volatile semiconductor memory includes a gate insulating film referred to as a tunnel insulating film, a floating gate electrode functioning as a charge accumulation layer, an intergate insulating film, a control gate electrode, and the like. The non-volatile semiconductor memory charges electrons in the floating gate electrode by applying a high voltage to the control gate electrode and feeding a tunnel current to the tunnel insulating film. In this way, data are written in the memory cell transistor.
Usually, a high write voltage (Vpp) ranging from 15V to 25V is necessary for the tunnel current flowing to the tunnel insulating film. The write voltage is transferred from a transfer gate transistor to the memory cell transistor and then applied to the control gate electrode.
In general, the transfer gate transistor includes a gate insulating film, a first gate electrode, an intergate insulating film having an opening, a second gate electrode, and the like. The first gate electrode is electrically connected to the second gate electrode through the opening in the intergate insulating film. Usually, the transfer gate transistor is formed simultaneously with the memory cell transistor. Accordingly, the gate insulating film, the first gate electrode, the intergate insulating film, and the second gate electrode of the transfer gate transistor are generally formed of identical layers to those of the gate insulating film, the floating gate electrode, the intergate insulating film, and the control gate electrode of the memory cell transistor, respectively.
The transfer gate transistor has to transfer the write voltage Vpp to the source. Accordingly, it is necessary to apply the write voltage Vpp to the drain and to apply a voltage equivalent to a sum of the write voltage Vpp and a threshold voltage Vth of the transfer gate transistor to the second gate electrode. For this reason, the non-volatile semiconductor memory as described above requires a large charge pump circuit for generating such a high voltage as Vpp+Vth.
Japanese Patent Application Publication No. 2007-27666 describes an example of a non-volatile semiconductor storage device. FIG. 3, FIG. 4, and FIG. 5 in JP 2007-27666 disclose examples of cross-sectional structures of a memory cell transistor, a low voltage transistor, and a high voltage transistor, respectively.